1. Field of the Invention
The present invention relates to a technique for a semiconductor device including a nonvolatile memory device.
2. Background Art
In recent years, solid state drives (SSDs) constituted by a plurality of NAND flash memories and a controller have been used in server apparatuses, laptop PCs, notebook PCs, etc. For example, NAND flash data sheet (TC58NVG2S3ETA00) discloses a fact that there is an upper limit on the number of times a NAND flash memory is erased and the data write size and the data erase size differ largely from each other. Also, JP Patent Publication (Kokai) Nos. 2008-146255A, 07-153285A (1995), and 2004-240572A and JP Patent No. 3926985 (2007), for example, disclose methods of controlling a NAND flash memory.
Further, technical matters studied by the inventors of the present invention include, for example, a semiconductor device that includes a phase-change memory. This kind of memory uses a chalcogenide material (or a phase-change material), i.e., a Ge—Sb—Te based material, an Ag—In—Sb—Te based material or the like containing at least antimony (Sb) and tellurium (Te), as a material for a recording layer. A diode is used as a selecting element in this kind of memory. “IEEE International Solid-State Circuits Conference, Digest of Technical Papers”, (US), 2007, p. 472-473, for example, discloses the characteristics of a phase-change memory using a chalcogenide material and diodes.
FIG. 1 is a diagram showing the relationship between pulse widths and temperatures necessary for a phase change in a resistive memory element using a phase-change material. The ordinate represents temperature and the abscissa represents time. When information “0” to be stored is written to this memory element, a reset pulse is applied such that the element is heated to a temperature equal to or higher than the melting point Ta of the chalcogenide material and is then rapidly cooled, as shown in FIG. 1. The cooling time t1 is reduced (set to about 1 ns for example) to set the chalcogenide material in a high-resistance amorphous state.
Conversely, when information “1” to be stored is written, a set pulse is applied such that the memory element is maintained in a temperature region lower than the melting point Ta but higher than a crystallization temperature Tx (equal to or higher than the glass transition point). The chalcogenide material is thereby set in a low-resistance polycrystalline state. The time t2 required for crystallization varies depending on the composition of the chalcogenide material. The temperature of the element shown in FIG. 1 depends on Joule heat produced by the memory element itself and diffusion of heat to a surrounding.
Also, electric power required for a change in state in a phase-change film in a phase-change memory is reduced if the resistive element structure is made smaller, as described in “IEEE International Electron Devices meeting, TECHNICAL DIGEST” (US), 2001, p. 803-806. Therefore, phase-change memories are theoretically suitable to be made smaller and studies on phase-change memories are being energetically made. “IEEE JOURNAL OF SOLID-STATE CIRCUIT, VOL. 40, No. 1, JANUARY 2005”, (US), 2005, p. 293-300 discloses a phase-change memory in which a time of about 120 ns is required for setting a chalcogenide material in a low-resistance state and a time of about 50 ns is required for setting the chalcogenide material in a high-resistance state.